Obstacles encountered in the PCIe 6.0 and 7.0 standards

The adoption of new technologies may face some delays.

Earlier this week, the organization responsible for developing the PCI Express specification, PCI-SIG, held its 2024 developer conference, where the latest progress on PCIe 6.0 and PCIe 7.0 was provided, noting that although progress is being made, it is slower than initially expected. As a result, the adoption of new technologies may face some delays, as reported by ComputerBase.

In particular, PCI-SIG is delaying the start of its compliance program. Preliminary compliance testing for PCIe 6.0 was originally scheduled to begin in March, but it has now been postponed to the "second quarter," which theoretically means they are about to start. A three-month delay may not seem like a big issue, as the first batch of PCIe 6.0 platforms will be launched later this year. However, the problem is that the list of integrators for compliant products will not be available until 2025. PCIe 6.0 platforms will have to rely on PCIe 5.0 hardware or use PCIe 6.0 components without formal compliance guaranteed by PCI-SIG.

The situation worsens with the change in the timeline for the PCIe 7.0 compliance program, as compliance testing has been postponed to 2028 instead of the previously announced 2027. The development of PCIe 7.0 has reached the 0.5 draft, and the final version 1.0 is expected to be released in 2025. This version aims to provide a data transfer rate of 16 GB/s per channel, with a maximum configuration offering 256 GB/s. Dual simplex operation can achieve a rate of up to 512 GB/s, which is twice the 256 GB/s of PCIe 6.0. However, due to the inability to ensure compatibility between hosts and devices before 2028, PCIe 7.0 will not be able to truly take off until later in this decade.

Advertisement

In August 2023, PCI-SIG established a working group to solicit industry opinions on the development of PCIe optical interconnects. The optical working group is technology-agnostic and adaptable to various optical technologies, while potentially creating specific form factors for PCIe solutions. These form factors may include pluggable optical transceivers, on-board optics, co-packaged optics, and optical I/O.

At the developer conference, PCI-SIG provided an update on its optical initiative. The group is currently working on updating the logical and electrical layers of the PCIe 6.0 specification to integrate the new optical standards. A significant update called an Engineering Change Notice (ECN) is expected to be completed by December 2024, enhancing the existing electrical standards without replacing them. In addition, the working group has begun working on the optical PCIe standardization for the PCIe 7.0 specification, with a release target set for 2025.Vice President of PCI-SIG, Richard Solomon, stated: "We received many questions about this issue, why can't we go faster? Why did it take so long? What are you doing? The answer is, there is a period of time from the completion of the specification to the availability of silicon. We really can't establish a compliance plan until we have chips. So, we started as early as possible, in fact, we were in the middle of 2024. The PCI-Express 6.0 specification was released in January 2022. It took the industry a full two years, almost two and a half years, to reach the point where we have tested, and we have silicon. All these pieces are in place. In fact, we are making quite good progress in the compliance plan. If this sounds like an excuse, I apologize. It really isn't. It's just explaining the things in our schedule."

The Next Platform last year believed that PCI-SIG needed to speed up its timetable and push the roadmap of PCI-Express to synchronize with the roadmaps of chip manufacturers and server suppliers. It is a widely used interconnect suitable for the industry that also has Ethernet, InfiniBand, and Nvidia's proprietary GPU NVLink, and it is expected that the demand for PCI-Express will grow as more and more CXL-based hierarchical and shared main memory is used.

However, an organization with so many members - it has about 970 members and is still growing - and each specification is highly deliberated, may not be established for speed. There are countless committees and working groups that can address specifications, FYI fronts, and FYI tests, as well as compliance seminars that may lead to various changes.

"The equipment that completes our compliance plan can be listed on our website, on the Innovator's List, members - actually non-SIG members, because this is a publicly accessible website - can view and make decisions when they make purchasing decisions and design decisions, which products they may want to consider based on our compliance testing," Solomon said: "Our compliance plan is not a verification or certification plan. We are really focused... on interoperability. Our compliance plan tests the most important aspects of interoperability. For such a high-speed signal bus, a lot of testing is electrical testing."

He said that given that the PCI-Express 7.0 specification is expected to be approved sometime between the middle and the end of next year, its integrator list may be released in 2028, and added: "I hope we can do it faster. I hope the silicon comes out faster... This is where we are in reality."

That is to say, Solomon said that PCI-SIG has been able to lead the industry's needs. It can be seen from the following chart that the bandwidth capabilities in the PCI-Express 6.0 and 7.0 specifications are about three years earlier than the pace of doubling the I/O bandwidth every three years, although the 4.0 specification was released very late.

"Some of you have been around long enough to point out the small problems of PCI-Express 4.0 and feel sad about it... But in the past few years, we have managed to maintain a gap of three to four years between formulating this specification and the industry's real need for bandwidth," he said: "There are always parts of the ecosystem that need more and more bandwidth. However, we have done very well in maintaining the top of this curve and continuing to develop reliable specifications that people can use."